This invention relates, in general, to a method of making field effect transistors, and more particularly, to a method of making symmetrical and asymmetrical Metal Semiconductor Field Effect Transistors (MESFETs) High Electron Mobility Transistors (HEMTs).
In the past, MESFETs have been fabricated symmetrically having highly doped N.sup.+ source/drain regions on either side of a self-aligned gate electrode. This structure has several disadvantages due to its symmetry. First, the close proximity of one of the N.sup.+ regions, the drain, to the gate electrode causes a large reduction in the gate-drain breakdown voltage. A high gate-drain breakdown voltage is required for power MESFETs because a low gate-drain breakdown voltage will severely limit the power handling capability of the MESFET. In the past asymmetrical devices have been built utilizing very complex processing. It would be desirable to come up with a very manufacturable and low-cost process to fabricate asymmetical MESFETs.
It would also be desirable to fabricate asymmetrical and symmetrical devices on the same substrate to meet the needs of different applications. For example, a MESFET used for digital applications only requires a low breakdown voltage. However, a digital MESFET requires a high transconductance. Transconductance is dependent on the channel length of the device, or the distance between the N.sup.+ source/drain regions. Analog applications also require MESFETs with high breakdown voltages and high transconductance. It would be desirable to form a variety of devices for use in power, analog, and digital applications which are all integrated in one chip. Thus, it would be desirable to form MESFETs having varying channel lengths and varying spacing between the drain region and the gate electrode. Of course, it is desirable that this process produce state-of-the-art devices at a low cost.